Logic Synthesis and Verification Algorithms

Logic Synthesis and Verification Algorithms

MIA KARTS BOOKS

Logic Synthesis and Verification Algorithms
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    Logic Synthesis and Verification Algorithms

    $187.00 CAD
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    Book Details

    Format
    Paperback
    Language
    English
    Condition
    Used
    ISBN-13
    9780387310046
    ISBN-10
    0387310045

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    Product description

    ISBN: 0387310045

    Author: Hachtel, Gary D.

    Condition: Used

    This book blends mathematical foundations and algorithmic developments with circuit design issues. Each new technique is presented in the context of its application to design. Through the study of optimal two-level and multilevel combinational circuit design, the reader is introduced to basic concepts, such as Boolean algebras, local search, and algebraic factorization. Similarly, through the study of optimal sequential circuit design, the reader is introduced to graph algorithms, finite state systems, and language theory. Throughout the book, recurrent themes such as branch and bound, dynamic programming, and symbolic implicit enumeration are used to establish optimal design principles.

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    Logic Synthesis and Verification Algorithms

    $187.00 CAD
     per 
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